Capacitor-less IGZO-based DRAM cell with excellent retention, endurance and gate length scaling

Capacitor-less indium-gallium-zinc-oxide (IGZO)-based DRAM compartment architectures amusement large imaginable for realizing high-density 3D DRAM memories.

In this article, Gouri Sankar Kar, representation programme manager astatine imec, reveals an IGZO-based DRAM compartment that has fantabulous specifications for DRAM representation applications—thanks to an optimization of the IGZO transistor architecture. In addition, helium shows the archetypal beingness estimation of the DRAM cell's cardinal components, based connected caller insights into the reliability of IGZO thin-film transistors.

The results are presented successful 2 papers astatine the 2021 IEEE International Electron Devices Meeting (IEDM).

Toward high-density 3D DRAM

At past year's International Electron Devices Meeting (2020 IEDM), imec demonstrated for the archetypal clip a capacitor-less dynamic random entree representation (DRAM) cell, implementing 2 indium-gallium-zinc-oxide (IGZO) thin-film transistors (TFTs) and nary capacitor. This caller 2-transistor-0-capacitor (2T0C) DRAM compartment architecture promises to flooded the cardinal obstacles for classical 1-transistor-1-capacitor (1T1C) DRAM density scaling, i.e., the ample off-current of Si transistors astatine tiny compartment sizes, and the ample country consumed by the retention capacitor. In a 2T0C IGZO-TFT DRAM cell, determination is nary request for a retention capacitor, arsenic the parasitic capacitance of the work transistor serves arsenic the retention element. In addition, IGZO-TFTs are known for their precise debased off-current, starring to enhanced retention of the representation cell. Finally, the quality to process IGZO-TFTs successful the back-end-of-line (BEOL) allows to trim the DRAM memory's footprint (by moving the representation compartment nether the representation array) and to stack idiosyncratic DRAM cells—hence providing a way toward high-density 3D DRAM. This improvement is needed to proceed to supply capable DRAM capableness for data-intensive applications (such arsenic artificial intelligence, internet-of-things, information centers and unreality computing).

In 2020, a archetypal 2T0C IGZO-based DRAM compartment with >400s retention clip could beryllium demonstrated, which led to importantly reduced refresh complaint and powerfulness depletion compared to classical DRAM variants. The devices were manufactured connected 300mm wafers, and gross lengths were scaled down to 45nm. However, successful this archetypal 'conceptual' demonstration, the IGZO TFTs were not optimized for maximal retention, and an appraisal of the endurance (i.e., the fig of read/write cycles earlier failure) was inactive missing. Also, astatine that time, nary close exemplary existed for predicting the beingness of the IGZO devices.

>10³s retention, unlimited endurance and gross magnitude scalability down to 14nm

At the 2021 IEDM, imec presents a afloat 300mm BEOL compatible IGZO-based capacitorless DRAM compartment with improved specifications, i.e., >10³s retention and unlimited (>10¹¹) endurance. These results were obtained aft selecting the astir optimal integration strategy for the azygous IGZO transistors, i.e., a gate-last integration strategy with buried oxygen passageway and self-aligned contacts. The implementation of a buried oxygen passageway successful operation with an anneal successful O₂ ambient was proven to trim the oxygen-vacancy attraction successful the IGZO transmission without impacting the bid absorption astatine root and drain region—leading to larger on-current and little off-current.

With this architecture, the gross magnitude of the IGZO TFT could beryllium scaled down to an unprecedented 14nm, portion inactive preserving >100s retention. The retention astatine tiny gross magnitude could beryllium further optimized by controlling the threshold voltage (Vt) done equivalent oxide thickness (EOT) scaling, by interaction absorption betterment and by reducing the IGZO furniture thickness. When the second thickness is reduced to 5nm, the oxygen passageway and anneal measurement successful O₂ tin adjacent beryllium omitted—leading to a much-simplified integration approach.

More details connected the selected integration attack and connected the achieved instrumentality specifications are described successful the 2021 IEDM insubstantial "Tailoring IGZO-TFT architecture for capacitorless DRAM, demonstrating >10³s retention, >10¹¹ cycles endurance and Lg scalability down to 14nm" by A. Belmonte et al.

Lifetime estimation based connected PBTI reliability modeling

So far, an close exemplary for predicting the IGZO-based DRAM beingness is lacking since the IGZO TFT's degradation mechanisms are not afloat understood. IGZO transistors are inherently n-type devices, and this points to affirmative bias somesthesia instability (PBTI) arsenic perchance the main degradation mechanism.

PBTI is simply a well-known aging mechanics successful Si n-type metal-oxide-semiconductor field-effect transistors (MOSFETs) wherever it tin severely impact the instrumentality show and reliability. It typically manifests itself arsenic an undesirable displacement of the instrumentality threshold voltage and a alteration of the drain current. For these Si-based devices, PBTI is ascribed to the beingness of electron traps successful the gross dielectric, trapping complaint carriers from the instrumentality conduction channel.

Most of the existing reliability assessments connected IGZO TFTs neglect nevertheless the interaction of the gross dielectric. Imec has for the archetypal clip studied the interaction of the gross dielectric connected the PBTI of IGZO TFTs. The results are summarized successful the 2021 IEDM insubstantial "Understanding and modeling the PBTI reliability of thin-film IGZO transistors," by A. Chasin et al.

The squad recovered that 4 antithetic mechanisms play a relation successful the degradation process, each with antithetic clip kinetics and activation energies. They tin beryllium chiefly ascribed to some electron trapping successful the gross dielectric, and to the merchandise of hydrogen taxon from the gross dielectric into the IGZO transmission during PBTI stress.

The imec squad has combined these aggregate degradation mechanisms into a model, which makes it imaginable to foretell the IGZO TFT beingness astatine people cognition conditions. The exemplary is recovered to acceptable to experimental information and tin beryllium utilized to suggest optimizations for enhancing the lifetime. For example, by reducing the gross dielectric thickness, the predicted clip to nonaccomplishment tin beryllium enhanced from astir 20 days to astir 1 year.

Improvements to the IGZO-based DRAM compartment architecture and integration person enabled 2T0C DRAM representation cells with >10³ retention, unlimited endurance and gross magnitude scaling down to 14nm. These specifications marque capacitor-less IGZO-DRAM a suitable campaigner for realizing high-density 3D DRAM memories. The instrumentality improvements were complemented with caller insights into the IGZO TFT's reliability, revealing antithetic degradation mechanisms liable for the PBTI. These formed the cardinal ingredients of an accurate model with which the beingness of the DRAM memory's cardinal components tin beryllium predicted.

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